As the level of integration of a semiconductor device increases, components of the device, e.g., transistors, generally become smaller in size. When the size of a transistor is reduced, the junction depth of impurity regions such as source and drain regions may also be reduced. When a metal wiring pattern is formed on a shallow impurity region and then undergoes subsequent thermal processing, a junction spiking phenomenon may occur in which metal atoms penetrate into the impurity region and the silicon substrate situated thereunder. This junction spiking may cause the semiconductor device to malfunction. To combat this phenomenon, a technique has been developed for preventing metal atoms of metal wiring from diffusing into the impurity region and the silicon substrate has been developed wherein a barrier metal film such as a titanium nitride film or a tantalum nitride film is formed between the metal wiring and the impurity region.
A typical cell capacitor in a unit cell of a semiconductor memory device such as a dynamic random access memory (DRAM) includes a storage electrode, a dielectric film formed on the storage electrode and a plate electrode formed on the dielectric film. As integration density is increased, the area occupied by a unit cell typically decreases, and thus the capacitance of the cell capacitor typically is reduced. The reduction in the cell capacitance may cause three problems: (1) the amount of charge stored in the cell capacitor may be decreased such that low-voltage operation characteristics are degraded; (2) the refresh cycle for supplying charge to the cell may need to be shortened to maintain information in the cell; and (3) soft error rate (SER) of the cell may be increased. Thus, it is generally desirable to increase the cell capacitance in order to improve power consumption and reliability of the device, the cell capacitance must be increased.
There are various techniques for increasing the cell capacitance. One conventional technique uses a material having a high dielectric constant, for example, (Ba,Sr)TiO.sub.3 (BST) or a Pb(Zr,Ti)O.sub.3 (PZT), as the dielectric film of a cell capacitor. However, when such a film is used, the selection of the material used for the electrode, in particular, the material used for the storage electrode of the capacitor, generally is important. One conventional technique uses a platinum (Pt) storage electrode having superior oxidation resistivity. Unfortunately, however, platinum (Pt) tends to readily react with a silicon substrate or a silicon film at a temperature of over 300.degree. C., forming a platinum silicide film (PtSi.sub.x) which can increase the resistance of the storage electrode. Consequently, a barrier metal film typically is formed between the platinum film and the silicon substrate to prevent platinum atoms from being diffused into the silicon substrate.
A well-known technique for forming a barrier metal film utilizes a reactive sputtering process employing a titanium target or a tantalum target under an argon and nitrogen atmosphere. However, the barrier metal film formed by the sputtering process typically exhibits inferior step coverage and generally takes on a polycrystalline state. Consequently, when a metal wiring pattern is formed on the barrier metal film and undergoes subsequent heat treatment, metal atoms may be easily diffused through a grain boundary of the barrier metal film and into underlying structures. When a silicon substrate underlies the barrier metal film, metal atoms in the metal wiring pattern and silicon atoms in the silicon substrate may diffuse through a grain boundary of the barrier metal film and react, thereby forming a metal silicide and increasing the resistivity of the contact between the metal wiring pattern and the substrate.
An alternative technique for forming a barrier metal film involves forming a tantalum nitride film using penta dimethyl amido tantalum Ta(N(CH.sub.3).sub.2).sub.5 as a metal source in order to form the barrier metal film in an amorphous state (see R. Fix et al., Chemical Material, 5, 614(1993)). According to this technique, the barrier metal film of Ta.sub.3 N.sub.5 is formed using an ammonia (NH.sub.3) gas as a reducing agent. However, as the resistivity of the tantalum nitride film (Ta.sub.3 N.sub.5) formed at a temperature of 500.degree. C. is typically around 1.times.10.sup.6 .mu..OMEGA.-cm, the tantalum nitride film (Ta.sub.3 N.sub.5) so formed may not be suitable for use as a barrier metal film in a cell of a highly-integrated semiconductor device because of less than desirable conductivity, as illustrated in FIG. 2a. In addition, when the deposition temperature of the tantalum nitride film is 700.degree. C. or higher, or the temperature in a subsequent heat treatment is 800.degree. C. or higher, the tantalum nitride film (Ta.sub.3 N.sub.5) may transform to a polycrystalline state (see FIGS. 3a, 5a and 5b). Thus, when a storage electrode of a capacitor is formed from a tantalum nitride film (Ta.sub.3 N.sub.5), it may be undesirable to perform subsequent heat treatment at temperatures of 800.degree. C. and higher.